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| author | bob mcgrath <bobwmcgrath@gmail.com> | 2019-09-27 07:52:59 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-09-27 07:52:59 +0000 |
| commit | 1dee3c9acd0ef20c0accb851b3291b9c73ce77cc (patch) | |
| tree | 0ca2d6b0675e4bf9eaa88d708c98c796eebdf430 | |
| parent | 0e6ba75e13403f4cdca0917d196db939b2a02ec3 (diff) | |
Update blink.v
| -rw-r--r-- | verilog-blink-minimal/blink.v | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/verilog-blink-minimal/blink.v b/verilog-blink-minimal/blink.v index b29e8e1..34d822b 100644 --- a/verilog-blink-minimal/blink.v +++ b/verilog-blink-minimal/blink.v @@ -5,9 +5,6 @@ // Red LED turned on when Button 6 is pressed. // -`define BLUEPWM RGB0PWM -`define GREENPWM RGB1PWM -`define REDPWM RGB2PWM module top ( // 48MHz Clock input |